PSSE_CONVERT_HVDC Convert HVDC data from PSS/E RAW to MATPOWER
DCLINE = PSSE_CONVERT_HVDC(DC, BUS)
Convert all two terminal HVDC line data read from a PSS/E
RAW data file into MATPOWER format. Returns a dcline matrix for
inclusion in a MATPOWER case struct.
Inputs:
DC : matrix of raw two terminal HVDC line data returned by
PSSE_READ in data.twodc.num
BUS : MATPOWER bus matrix
Output:
DCLINE : a MATPOWER dcline matrix suitable for inclusion in
a MATPOWER case struct.
See also PSSE_CONVERT.0001 function dcline = psse_convert_hvdc(dc, bus) 0002 %PSSE_CONVERT_HVDC Convert HVDC data from PSS/E RAW to MATPOWER 0003 % DCLINE = PSSE_CONVERT_HVDC(DC, BUS) 0004 % 0005 % Convert all two terminal HVDC line data read from a PSS/E 0006 % RAW data file into MATPOWER format. Returns a dcline matrix for 0007 % inclusion in a MATPOWER case struct. 0008 % 0009 % Inputs: 0010 % DC : matrix of raw two terminal HVDC line data returned by 0011 % PSSE_READ in data.twodc.num 0012 % BUS : MATPOWER bus matrix 0013 % 0014 % Output: 0015 % DCLINE : a MATPOWER dcline matrix suitable for inclusion in 0016 % a MATPOWER case struct. 0017 % 0018 % See also PSSE_CONVERT. 0019 0020 % MATPOWER 0021 % Copyright (c) 2014-2015 by Power System Engineering Research Center (PSERC) 0022 % by Yujia Zhu, PSERC ASU 0023 % and Ray Zimmerman, PSERC Cornell 0024 % Based on mpdcin.m and mpqhvdccal.m, written by: 0025 % Yujia Zhu, Jan 2014, yzhu54@asu.edu. 0026 % 0027 % $Id: psse_convert_hvdc.m 2644 2015-03-11 19:34:22Z ray $ 0028 % 0029 % This file is part of MATPOWER. 0030 % Covered by the 3-clause BSD License (see LICENSE file for details). 0031 % See http://www.pserc.cornell.edu/matpower/ for more info. 0032 0033 %% define named indices into bus, gen, branch matrices 0034 [PQ, PV, REF, NONE, BUS_I, BUS_TYPE, PD, QD, GS, BS, BUS_AREA, VM, ... 0035 VA, BASE_KV, ZONE, VMAX, VMIN, LAM_P, LAM_Q, MU_VMAX, MU_VMIN] = idx_bus; 0036 c = idx_dcline; 0037 0038 nb = size(bus, 1); 0039 ndc = size(dc, 1); 0040 e2i = sparse(bus(:, BUS_I), ones(nb, 1), 1:nb, max(bus(:, BUS_I)), 1); 0041 if ~ndc 0042 dcline = []; 0043 return; 0044 end 0045 0046 %% extract data 0047 MDC = dc(:,2); % Control mode 0048 SETVL = dc(:,4); % depend on control mode: current or power demand 0049 VSCHD = dc(:,5); % scheduled compounded dc voltage 0050 ANMXR = dc(:,15); % nominal maximum rectifier firing angle 0051 ANMNR = dc(:,16); % nominal minimum rectifier firing angle 0052 GAMMX = dc(:,32); % nominal maximum inverter firing angle 0053 GAMMN = dc(:,33); % nominal minimum inverter firing angle 0054 SETVL = abs(SETVL); 0055 % Convert the voltage on rectifier side and inverter side 0056 % The value is calculated as basekV/VSCHD 0057 % basekV is the bus base voltage, VSCHD is the scheduled compounded 0058 % voltage 0059 dcline = zeros(ndc, c.LOSS1); % initiate the hvdc data format 0060 indr = dc(:,13); % rectifier end bus number 0061 indi = dc(:,30); % inverter end bus number 0062 dcind = [indr indi]; 0063 % bus nominal voltage 0064 Vr = bus(e2i(indr), VM); 0065 Vi = bus(e2i(indi), VM); 0066 %% Calculate the real power input at the from end 0067 PMW = zeros(ndc, 1); 0068 for i = 1:ndc 0069 if MDC(i) == 1 0070 PMW(i) = SETVL(i); % SETVL is the desired real power demand 0071 elseif MDC(i) == 2; 0072 PMW(i) = SETVL(i)*VSCHD(i)/1000; % SETVL is the current in amps (need devide 1000 to convert to MW) 0073 else PMW(i) = 0; 0074 end 0075 end 0076 %% calculate reactive power limits 0077 [Qrmin,Qrmax] = psse_convert_hvdc_Qlims(ANMXR,ANMNR,PMW); %% rectifier end 0078 [Qimin,Qimax] = psse_convert_hvdc_Qlims(GAMMX,GAMMN,PMW); %% inverter end 0079 %% calculate the loss coefficient (Only consider the l1) 0080 % l1 = P'.*RDC; 0081 0082 %% conclude all info 0083 status = ones(ndc, 1); 0084 status(MDC==0) = 0; %% set status of blocked HVDC lines to zero 0085 % dcline(:,[1 2 3 4 5 8 9 10 11 12 13 14 15]) = [indr,indi,status,PMW, PMW, Vr, Vi,0.85*PMW, 1.15*PMW, Qrmin, Qrmax, Qimin, Qimax]; 0086 dcline(:, [c.F_BUS c.T_BUS c.BR_STATUS c.PF c.PT c.VF c.VT ... 0087 c.PMIN c.PMAX c.QMINF c.QMAXF c.QMINT c.QMAXT]) = ... 0088 [indr indi status PMW PMW Vr Vi 0.85*PMW 1.15*PMW Qrmin Qrmax Qimin Qimax]; 0089 0090 0091 function [Qmin, Qmax] = psse_convert_hvdc_Qlims(alphamax,alphamin,P) 0092 %PSSE_CONVERT_HVDC_QLIMS calculate HVDC line reactive power limits 0093 % 0094 % [Qmin, Qmax] = psse_convert_hvdc_Qlims(alphamax,alphamin,P) 0095 % 0096 % Inputs: 0097 % alphamax : maximum firing angle 0098 % alphamin : minimum steady-state rectifier firing angle 0099 % P : real power demand 0100 % Outputs: 0101 % Qmin : lower limit of reactive power 0102 % Qmax : upper limit of reactive power 0103 % 0104 % Note: 0105 % This function calculates the reactive power at the rectifier or inverter 0106 % end. It is assumed the maximum overlap angle is 60 degree (see 0107 % Kimbark's book). The maximum reactive power is calculated with the 0108 % power factor: 0109 % pf = acosd(0.5*(cosd(alphamax(i))+cosd(60))), 0110 % where, 60 is the maximum delta angle. 0111 0112 len = length(alphamax); 0113 phi = zeros(size(alphamax)); 0114 Qmin = phi; 0115 Qmax = phi; 0116 for i = 1:len 0117 %% minimum reactive power calculated under assumption of no overlap angle 0118 %% i.e. power factor equals to tan(alpha) 0119 Qmin(i) = P(i)*tand(alphamin(i)); 0120 0121 %% maximum reactive power calculated when overlap angle reaches max 0122 %% value (60 deg). I.e. 0123 %% cos(phi) = 1/2*(cos(alpha)+cos(delta)) 0124 %% Q = P*tan(phi) 0125 phi(i) = acosd(0.5*(cosd(alphamax(i))+cosd(60))); 0126 Qmax(i) = P(i)*tand(phi(i)); 0127 if Qmin(i)<0 0128 Qmin(i) = -Qmin(i); 0129 end 0130 if Qmax(i)<0 0131 Qmax(i) = -Qmax(i); 0132 end 0133 end